Intel MCS48 User Manual page 214

8755A
ABSOLUTE MAXIMUM
RATINGS*
Temperature Under
Bias
-10°C
to
+70°C
Storage Temperature -65°Cto +150°C
Voltage
on
Any
Pin
With Respect
to
Ground
-0.5 to
+7V*
Power
Dissipation 1.5W
"Except
for
programming
voltage.
•COMMENT
Stresses above
those
listed
under "Absolute
Maximum
Ratings"
may cause
permanent damage
to
the device. This
is
a stress rating
only and
functional
operation
of
the device
at
these or
any
other conditions
above those
indicated
in
the operational sections
of this specification
is
not
implied.
Exposure
to
absolute
maximum
rating conditions for
extended
periods
may
affect
device
reliability.
D.C.
CHARACTERISTICS
(T
A
=
0°C
to
70°C;
V
cc
=
5V
± 5%)
SYMBOL PARAMETER
MIN.
MAX.
UNITS
TEST CONDITIONS
V|L
Input
Low
Voltage
-0.5
0.8
V
V,
H
Input High Voltage
2.0
V
CC
-K)-5
V
Vol
Output
Low
Voltage
0.45
V
Iol
=
2mA
Voh
Output
High Voltage
2.4
V
Ioh = -400/iA
IlL
Input
Leakage
10
ma
Vin
=
V
CC
to
0V
Ilo
Output Leakage Current
±10 ma
0.45V
<V
ut
<V
CC
•cc
Vqc
Supply
Current
180
mA
A.C.
CHARACTERISTICS
<t
a
= o°c
to
70°c,
v
cc
=
5V
± 5%)
SYMBOL PARAMETER
MIN.
MAX. UNITS
TEST CONDITIONS
tCYC
Clock Cycle
Time 320
ns
T1
CLK
Pulse
Width 80
ns
Cload
= 150 pF
T
2
CLK
Pulse
Width 120
ns
(See Figure
3)
tf,t
r
CLK
Rise
and
Fall
Time 30
ns
tAL
Address
to
Latch
Set
Up
Time 50
ns
tLA
Address Hold Time
after
Latch
80
ns
tLC
Latch to
READ/WRITE
Control
100
ns
*RD
Valid Data
Out
Delay
from
READ
Control
170
ns
*AD
Address
Stable to Data
Out
Valid
450
ns
1
50 pF Load
tLL
Latch Enable
Width 100
ns
tRDF
Data
Bus
Float
after
READ
100
ns
tCL
READ/WRITE
Control to
Latch Enable 20
ns
tec
READ/WRITE
Control Width
250
ns
tDW
Data
In
to
WRITE
Set
Up
Time
150
ns
*WD
Data
In
Hold Time
After
WR
ITE 30 ns
t
W
p
WRITE
to Port
Output
400
ns
tpR
Port Input Set
Up Time
50 ns
tRP
Port Input Hold
Time 50 ns
tRYH
READY HOLD
TIME
160 ns
*ARY
ADDRESS
(CE) to
READY
160 ns
tRV
Recovery Time between
Controls
300
ns
tRDE
Data
Out
Delay
from
READ
Control
10 ns
tLD
ALE
to
Data
Out
Valid
350
ns Preliminary
6-62