Intel MCS48 User Manual page 155

Family of single chip microcomputers
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8048/8648/8748/8035
INSTRUCTION SET
Description
Bytes
Cycle
Mnemonic
Description
Bytes
Cycles
ADD
A,
R
Add
register
to
A
1
ADD
A,
@R
Add
data
memory
to
A
1
ADD
A, -data
Add
immediate
to
A
2
2
ADDC
A,
R
Add
register
wi*h
carry
1
ADDC
A,
@R
Add
data
memory
with
carry
1
ADDC
A, #data
Add
immediate
with
carry
2
2
ANL
A,
R
And
register
to
A
1
ANL
A,
@R
And
data
memory
to
A
1
ANL
A, -data
And
immediate
to
A
2
2
ORL
A,
R
Or
register
to
A
1
ORL
A,
@R
Or
data
memory
to
A
1
3
ORL
A, #data
Or immediate
to
A
2
2
b
3
XRLA,
R
Exclusive
or
register
to
A
1
u
<
XRLA, @R
Exclusive or data
memory
to
A
1
XRLA,
#data
Exclusive or
immediate
to
A
2
2
INC
A
Increment
A
1
DEC A
Decrement
A
1
CLR A
Clear
A
1
CPLA
Complement
A
1
DA
A
Decimal
adjust
A
1
SWAP A
Swap
nibbles
of
A
1
RLA
Rotate
A
left
1
RLC A
Rotate
A
left
through
carry
1
RR A
Rotate
A
right
1
RRC
A
Rotate
A
right
through
carry
1
IN
A, P
Input port
to
A
1
2
OUTLP,
A
Output
A
to
port
1
2
ANL
P,
idata
And
immediate
to
port
2
2
3
ORL
P,
#data
Or immediate
to
port
2
2
3
INS
A,
BUS
Input
BUS
to
A
1
2
o OUTL
BUS,
A
Output
A
to
BUS
1
2
3
Q.
ANL
BUS,
*data
And
immediate
to
BUS
2
2
C
ORL
BUS,
-data
Or immediate
to
BUS
2
2
MOVD
A, P
Input
expander
port
to
A
1
2
MOVD
P,
A
Output
A
to
expander
port
1
2
ANLD
P,
A
And
A
to
expander
port
1
2
ORLD
P,
A
Or
A
to
expander
port
1
2
«
INCR
Increment
register
1
1
K
INC
@R
Increment
data
memory
1
1
DECR
Decrement
register
1
1
JMP
addr
Jump
unconditional
2
2
JMPP
@A
Jump
indirect
1
2
DJNZR,addr
Decrement
register
and
skip
2
2
JC
addr
Jump
on
carry
=
1
2
2
JNCaddr
Jump
on
carry =
2
2
J
2
addr
Jump
on
A
zero
2
2
JNZaddr
Jump
on
A
not
zero
2
2
u
c
IS
JTO
addr
Jump
on
TO
=
1
2
2
JNTO
addr
Jump
on
TO
=
2
2
GO
JT1 addr
Jump
on T1
=
1
2
2
JNT1
addr
Jump
on T1
=
2
2
JFOaddr
Jump
on
FO
=
1
2
2
JF1 addr
Jump
on
F1
=
1
2
2
JTF
addr
Jump
on
timer
flag
2
2
JNI addr
Jump
on
INT
=
2
2
JBb
addr
Jump
on accumulator
bit
2
2
c
CALL
addr
Jump
to
subroutine
2
2
3
o
RET
Return
1
2
.fi
3
V)
RETR
Return and
restore status
1
2
CLR
C
Clear carry
1
CPL
C
Complement
carry
1
Ol
CLR
FO
Clear
flag
1
LL
CPL
FO
Complement
flag
1
CLR
F1
Clear
flag
1
1
CPL
F1
Complement
flag
1
1
MOV
A,
R
Move
register
to
A
1
MOV
A,
@R
Move
data
memory
to
A
1
MOV
A, *data
Move
immediate
to
A
2
MOV
R,
A
Move
A
to
register
1
MOV
@R,
A
Move
A
to
data
memory
1
MOV
R,
=data
Move
immediate
to
register
2
>
MOV
@R,
-data
Move
immediate
to
data
memory
2
?
MOV
A,
PSW
Move
PSW
to
A
1
ra
MOV
PSW,
A
Move
A
to
PSW
1
O XCH
A,
R
Exchange
A
and
register
1
XCHA,@R
Exchange
A
and
data
memory
1
XCHD
A,
@R
Exchange
nibble
of
A
and
register
1
MOVX
A,
@R
Move
external data
memory
to
A
1
2
MOVX
@>R,
A
Move
A
to external data
memory
1
2
MOVP
A,
@A
Move
to
A
from
current page
1
2
MOVP3
A,
@A
Move
to
A
from
page
3
1
2
MOV
A,
T
Read
timer/counter
1
£
MOVT,
A
Load
timer/counter
1
3
STRTT
Start
timer
1
(J
STRT CNT
Start
counter
1
E
STOP
TCNT
Stop
timer/counter
1
ENTCNTI
Enable timer/counter
interrupt
1
DISTCNTI
Disable
timer/counter
interrupt
1
EN
1
Enable
external interrupt
1
DISI
Disable external interrupt
1
o
SELRBO
Select
register
bank
1
c
SELRB1
Select
register
bank
1
1
o SELMBO
Select
memory
bank
1
SELMB1
Select
memory
bank
1
1
ENTOCLK
Enable
clock
output
on
TO
1
No
operation
Mnemonics
copyright
Intel
Corporation
1976
6-3

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