Memory Can Be; In Sec - Intel MCS48 User Manual

SINGLE
COMPONENT
SYSTEM
The
Program/Verify sequence
is:
1.
Vdd
=
5v,
Clock
a pplied or
internal
oscillator operating, Reset
=
Ov Test
=
5v,
EA =
5v,
BUS
and
PROG
floating
2.
Insert
8748
in
programming
socket
3.
Test
=
Ov
(Select
Program Mode)
4.
EA =
23V
(Activate
Program Mode)
5.
Address
applied
to
BUS
and
P20-1
6.
Reset
=
5v
(Latch Address)
7.
Data
applied
to
BUS
8.
Vdd
=
25v (Programming Power)
9.
PROG
=
Ov
followed by
one
50ms
pulse
to
23V
10.
Vdd =
5v
11.
TEST =
5v
(Verify
Mode)
12.
Read
and
Verify
Data on
BUS
13.
TEST =
Ov
14.
Reset
=
Ov and
repeat from Step 5
15.
Programmer
should be
at
conditions
of
Step
1
when
8748
is
removed
from
socket.
2.4
Test
and
Debug
Several
MCS-48
features described
in
the
previous sections are discussed
here
to
emphasize
their
use
in
testing
MCS-48
components and
in
debugging
MCS-48
based
systems.
2.4.1
Single Step
Single
step
circuitry within the
micro-
computer
in
combination
with the external
circuitry
described
in
Section
2.1.13
allows
the user
to
execute one
instruction
at
a time
whether
the
instruction
is
one
or
two
cycles
in
length. After
completion
of
the
instruction
the processor
halts
with the
address
of
the
next
instruction to
be
fetched
available
on
the
eight
lines of
BUS
and
the lower
4-bits of
port
2.
P23
P22
P21
P20
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DBO
An
Aio
'9
ADDRESS OUTPUT DURING
SINGLE STEP
This allows the user
to step
through
his
program and
note the sequence
of instruc-
tions being executed.
While
the processor
is
stopped, the
I/O
information
on
BUS
and
the
4-bits of port
2
is,
of course, not
available. I/O information
is,
however,
valid at
the leading
edge
of
ALE
and
can be
latched externally using
this
signal
if
necessary.
2.4.2 Disabling
Internal
Program Memory
Applying +5V
to
the
EA
(external access)
pin
of
the
MCS-48
microcomputers
allows the
user
to effectively
disable
internal
program
memory
by
forcing
all
instruction fetches
to
occur from
an
external
memory.
This
external
memory
can be connected
as
explained
in
the section
on program
memory
expansion and can
contain a diagnostic
routine
to exercise the processor, the
internal
RAM,
the
timer,
and
the I/O
lines.
EA
should
be switched
only
when
the processor
is
in
RESET.
2.4.3
Reading
Internal
Program
Memory
Just as the
processor
may
be
isolated
from
internal
program
memory
using EA,
program
memory
can be
read independent
of
the
processor using
the
verification
mode
des-
cribed
in
the previous
section,
Programming/
Verification.
2-18