Shows The - Intel MCS48 User Manual

Family of single chip microcomputers
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EXPANDED
MCS-48
SYSTEM
data sheet
in
Chapter
6
for
details.
Also
included
in
the
8155
is
a
14-bit
program-
mable
timer.
The
clock
input
to
the timer
and
the timer overflow
output are
available
on
external
pins.
The
timer
can be
pro-
grammed
to
stop
on
terminal
count
or
to
continuously
reload
itself.
A
square
wave
or
pulse output
on
terminal
count can
also
be
specified.
I/O
Expansion Examples
(See Also Chapter
5)
The
accompanying
figure
shows
the
expansion
of I/O
using
multiple 8243's.
The
only
difference
from
a single
8243 system
is
the addition
of
chip
selects
provided
by
additional
8048
output
lines.
Two
output
lines
and
a
decoder
could
also
be used
to
address
the four
chips.
Large
numbers
of
8243's
would
require a chip select
decoder
chip
such
as the
8205
to
save
I/O
pins.
Also
shown
is
the
8048
interface to
a
stan-
dard
MCS-80
peripheral;
in
this
case, the
8255 Programmable
Peripheral
Interface,
a
40
pin part
which
provides three
8-bit
pro-
grammable
I/O ports.
The 8255
bus
interface
is
typical of
programmable
MCS-80
peripher-
als
with
an
8-bit
bidirectional
data
bus,
a
RD
and
WR
input
for
Read/Write
control,
a
CS
(chip select) input
used
to
enable
the
Read/
Write
control logic
and
the
address
inputs
used
to
select
various
internal registers.
r^
Ao
X
C^>
1
8255
PROGRAMMABLE
PERIPHERAL
INTERFACE
RD
<A>
P0
"
CO""
OPTION
#1
c
1
8255
PROGRAMMABLE
PERIPHERAL
INTERFACE
RD
T
<X>"r
OPTION
#2
INTERFACE
TO
MCS-80
PERIPHERALS
LOW
COST
I/O
EXPANSION
3-8

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