Intel MCS48 User Manual page 55

SINGLE
COMPONENT SYSTEM
The
processor
is
placed
in
the
READ
mode
by
applying a high voltage
(+23V
for
the
8748,
+12V
for
the 8048/8049)
to
the
EA
pin
and +5 V
to
the
TO
(8748
only)
input
pin.
RESET
must be
at
0V
when
voltage
is
ap-
plied to
EA.
The
address
of
the
location to
be read
is
then applied
to
the
same
lines
(TTL
levels)
of
BUS
and
Port 2
which
output
the
address during single step (see below).
The address
is
latch
ed by
a
"0" to "1"
transitio
n
on
RESET
and a high
level
on
RESET
causes
the
contents
of
the
program
memory
location
address ed
to
a
ppear on
the eight lines of
BUS.
RESET
must be
brought back
to
0V
before
leaving the
READ
mode.
8048
8748
DB7
DB6
DB5
DB4
DB3
DB2
ALE
TO
l/Oo
DIEN
CS
T
l/Oo
DIEN CS
•
Aio (8049) only)
.
A
9
Ae
-»
D6
-»•
D3
-c
-c
+23V
8748
+12V 8048
+SV
8748
NC
8048
V
2
7474
+12V(+23V)
<
<
X
READING INTERNAL
PROGRAM MEMORY
2-19