Intel MCS48 User Manual page 320

8255A/8255A-5
Combinations
of
MODE
1
Port
A
and
Port B can be
individually
defined
as
input or
output
in
Mode
1
to support
a
wide
variety of strobed I/O
applications.
CONTROL WORD
°7
D
6
°5
D
4
D
3
D
2
D
1
D
o
h 1
1
I
vol
1
I'M
Z.
PA
7
-PA
PC
4
p c
5
K
3
PC
6
.
7
PB
7
PB
PC,
PC
2
PC
2
"
-
PORT
A -
(STROBED INPUT)
PORT
B
-
(STROBED OUTPUT)
CONTROL
WORD
D
7
D
6
D
5
D
4
D
3
D
2
°1
D
o
1
i
|o|i
o
Ivo
1
M
z.
PA
7
-PA
PC
7
8
\
p
c
3
PC
4.5
2
PB
7
-PB
<^
PC
2
-
PC,
pc„
PORT A - (STROBED OUTPUT)
PORT
B
-
(STROBED
INPUT)
Figure
10.
Combinations
of
MODE
1
Operating
Modes
Output Operations
MODE
2 (Strobed
Bidirectional
Bus
I/O).
This
functional
configuration provides a
means
for
communicating
with
a peripheral device or structure
on a
single
8-bit
bus
for
both transmitting
and
receiving
data (bidirectional
bus
I/O).
"Handshaking" signals are provided
to
maintain
proper
bus
flow discipline
in
a similar
manner
to
MODE
1.
Interrupt
generation
and
enable/disable functions are
also available.
OBF
(Output Buffer
Ful).
The
OBF
output
will
go "low"
to
indicate that the
CPU
has
written
data out
to port A.
ACK
(Acknowledge).
A "low" on
this
input
enables the
tri-state
output buffer of port
A
to
send
out the data.
Otherwise, the output
buffer
will
be
in
the high
im-
pedance
state.
MODE
2 Basic Functional Definitions:
•
Used
in
Group
A
only
.
• One
8-bit,
bi-directional
bus
Port (Port
A) and
a 5-bit
control Port (Port C).
•
Both
inputs
and outputs
are latched.
• The
5-bit
control port (Port C)
is
used for control
and
status for the
8-bit,
bi-directional
bus port (Port
A).
Bidirectional
Bus
I/O
Control Signal Definition
INTR
(Interrupt
Request).
A
high
on
this
output
can be
used to interrupt the
CPU
for
both input or
output opera-
tions.
INTE
1
(The
INTE
Flip-Flop
Associated
with
OBF). Con-
trolled
by
bit
set/reset of
PC
6 .
Input Operations
STB
(Strobe Input)
STB
(Strobe
Input).
A "low" on
this
input
loads data
into
the input
latch.
IBF
(Input Buffer Full
F/F).
A
"high" on
this
output
in-
dicates that
data has
been
loaded
into
the input
latch.
INTE 2 (The
INTE
Flip-Flop
Associated with
IBF).
Con-
trolled
by
bit
set/reset of
PC
4 .
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00744A