Programming Model; Pwm 1 Control Register; Table 15-1 Pwm 1 Control Register Description - Motorola MC68VZ328 User Manual

Programming Model

15.4 Programming Model
This section contains programming information about both PWM 1 and PWM 2.
15.4.1

PWM 1 Control Register

This register controls the operation of the pulse-width modulator, and it also contains the status of the
PWM 1 FIFO. The register bit assignments are shown in the following register display. The register
settings are described in Table 15-1.
PWMC1
BIT 15 14
CLKSRC
TYPE rw rw
0 0
RESET
Name
CLKSRC Clock Source—This bit is used to select the
Bit 15 clock source to the pulse-width modulator.
PRESCALER Prescaler—This field is used to scale down
Bits 14–8 the incoming clock to divide by the
prescaler + 1. The prescaler is normally used
to generate a low single-tone PWMO signal.
For voice modulation, these bits are set to 0
(divide by 1). The default value is 0.
IRQ Interrupt Request—This bit indicates that the
Bit 7 FIFO has one or no bytes remaining, which
can be a signal of the need to fill the FIFO by
writing no more than two 16-bit words into the
PWMS register. This bit automatically clears
itself after this register is read, thus eliminating
an extra write cycle in the interrupt service rou-
tine. If the IRQEN bit is 0, this bit can be polled
to indicate the status of the period comparator.
This bit can be set to immediately post a PWM
interrupt for debugging purposes.
IRQEN Interrupt Request Enable—This bit controls
Bit 6 the pulse-width modulator interrupt. While this
bit is low, the interrupt is disabled.
15-4
PWM 1 Control Register
13 12 11 10 9
PRESCALER
rw rw rw rw rw
0 0 0 0 0
Table 15-1. PWM 1 Control Register Description
Description
MC68VZ328 User's Manual
8 7 6 5
IRQ IRQEN FIFOAV
rw rw rw rw
0 0 0 1
0x0020
0 = SYSCLK source is selected (default).
1 = CLK32 is selected.
Note: 32.768 kHz clock source is selected
when using a 32.768 kHz crystal. If a 38.4 kHz
crystal is used, 38.4 kHz is selected.
Any value between 0 and 127.
0 = The FIFO is not empty.
1 = The FIFO has one or no sample bytes
remaining.
0 = The PWM interrupt is disabled (default).
1 = The PWM interrupt is enabled.
0x(FF)FFF500
4 3 2 1 BIT 0
EN REPEAT CLKSEL
rw w w rw rw
0 0 0 0 0
Setting