Table 7-2. 16 Mbit Sdram-256 (16-Bit) And 512 (8-Bit) Page Size; Table 7-3. 64 Mbit Sdram-256 (16-Bit) And 512 (8-Bit) Page Size - Motorola MC68VZ328 User Manual

Motorola mc68vz328 integrated processor user's manual
Table of Contents

Advertisement

Table 7-2 through Table 7-5 on page 7-6 provide recommendations for MC68VZ328–to–SDRAM
connections and for selecting multiplexing options for different types of SDRAM.
Table 7-2. 16 Mbit SDRAM—256 (16-Bit) and 512 (8-Bit) Page Size
SDRAM
A0
A1
Pins
A1/
A2/
VZ Pins
MD0
MD1
PA11
PA12
Row
Address
Options
PA1
PA2
Column
Address
Options
(16-Bit)
PA0
PA2
Column
Address
Options
(8-Bit)
Note:
X = "don't care"
Table 7-3. 64 Mbit SDRAM—256 (16-Bit) and 512 (8-Bit) Page Size
SDRAM
A0
A1
Pins
A1/
A2/
VZ Pins
MD
MD
0
1
PA
PA
Row
11
12
Address
Options
PA
PA
Column
1
2
Address
Options
(16-Bit)
PA
PA
Column
0
2
Address
Options
(8-Bit)
Note: X = "don't care"
A2
A3
A4
A3/
A4/
A5/
MD2
MD3
MD4
PA13
PA14
PA15
PA3
PA4
PA5
PA3
PA4
PA5
A2
A3
A4
A5
A3/
A4/
A5/
A6/
MD
MD
MD
MD
2
3
4
5
PA
PA
PA
PA
13
14
15
16
PA
PA
PA
PA
3
4
5
6
PA
PA
PA
PA
3
4
5
6
DRAM Controller
A5
A6
A7
A6/
A7/
A8/
A9/
MD5
MD6
MD7
MD8
PA16
PA17
PA18
PA10
PA6
PA7
PA8
PA6
PA7
PA8
PA1
A6
A7
A8
A9
A7/
A8/
A9/
A10
MD
MD
MD
/MD
6
7
8
9
PA
PA
PA
PA
17
18
10
9
PA
PA
X
X
7
8
PA
PA
PA
X
7
8
1
DRAM Controller Operation
A8
A9
A10
BS
A10/
A11/
A12/
MD9
MD10
MD11
PA9
PA19
PA20
X
X
0
PA20
X
0
PA20
A10
A11
BS0
BS1
A11
A12
A13/
A14/
/MD
/MD
MD
10
11
12
PA
PA
PA21
PA22
19
20
0
X
PA21
PA22
0
X
PA21
PA22
MD
13
7-5

Advertisement

Table of Contents
loading

Table of Contents