Port B Select Register; Port C Registers; Table 10-10 Port B Pull-Up Enable Register Description; Table 10-11 Port B Select Register Description - Motorola MC68VZ328 User Manual

Motorola mc68vz328 integrated processor user's manual
Table of Contents

Advertisement

PBPUEN
BIT 7
PU7
TYPE
RESET
Table 10-10. Port B Pull-up Enable Register Description
Name
PUx
Pull-up—These bits enable the pull-up resis-
Bits 7–0
tors on the port.
10.4.2.5

Port B Select Register

The Port B select register (PBSEL) determines if a bit position in the data register (PBDATA) is assigned
as a general purpose I/O or to a dedicated I/O function. The settings for the bit positions are shown in
Table 10-11.
PBSEL
BIT 7
SEL7
TYPE
RESET
Name
SELx
Select —These bits select whether the internal chip
Bits 7–0
function or I/O port signals are connected to the
pins.
10.4.3

Port C Registers

Port C is composed of the following 8-bit general-purpose I/O registers:
Port C direction register (PCDIR)
Port C data register (PCDATA)
Port C pull-down enable register (PCPDEN)
Port C select register (PCSEL)
Each signal in the PCDATA register connects to an external pin. As with the other ports, each bit on Port C
is individually configured.
Port B Pull-up Enable Register
6
5
PU6
PU5
rw
rw
rw
1
1
1
Description
Port B Select Register
6
5
SEL6
SEL5
rw
rw
rw
1
1
1
Table 10-11. Port B Select Register Description
Description
I/O Ports
4
3
2
PU4
PU3
PU2
rw
rw
rw
1
1
1
0xFF
0 = Pull-up resistors are disabled
1 = Pull-up resistors are enabled
4
3
2
SEL4
SEL3
SEL2
rw
rw
rw
1
1
1
0xFF
0 = The dedicated function pins are connected.
1 = The I/O port function pins are connected.
Programming Model
0x(FF)FFF40A
1
BIT 0
PU1
PU0
rw
rw
1
1
Setting
0x(FF)FFF40B
1
BIT 0
SEL1
SEL0
rw
rw
1
1
Setting
10-11

Advertisement

Table of Contents
loading

Table of Contents