Exception Vectors; Table 9-1 Exception Vector Assignment - Motorola MC68VZ328 User Manual

programmable, but the lower 3 bits reflect the interrupt level that is being serviced. All interrupts are
maskable. Writing a 1 to a bit in the interrupt mask register disables that interrupt. If an interrupt is
masked, you can find out its status in the interrupt pending register.
9.2

Exception Vectors

A vector number is an 8-bit number that can be multiplied by four to obtain the address of an exception
vector. An exception vector is the memory location from which the processor fetches the address of a
software routine that is used to handle an exception. Each exception has a vector number and an exception
vector, as described in Table 9-1. User interrupts are part of the exception processing on the MC68VZ328,
and the vector numbers for user interrupts are configurable. For additional information regarding exception
processing, see the M68000 Family Programmer's Reference Manual.
Vector Number
Hex Decimal
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
A 10
B 11
C 12
D 13
E 14
F 15
10–17 16–23
18 24
19 25
Table 9-1. Exception Vector Assignment
Address Number
Decimal Hex
0 000
4 004
8 008
12 00C
16 010
20 014
24 018
28 01C
32 020
36 024
40 028
44 02C
48 030
52 034
56 038
60 03C
64–92 040–05C
96 060
100 064
Interrupt Controller
1
Space
SP
Reset: initial SSP
SP Reset: initial PC
SD
SD
SD Illegal instruction
SD
SD
SD TRAPV instruction
SD Privilege violation
SD
SD Line 1010 emulator
SD Line 1111 emulator
SD
Unassigned, reserved
SD
Unassigned, reserved
SD
Unassigned, reserved
SD Uninitialized interrupt vector
SD
Unassigned, reserved
SD
Spurious interrupt
SD Level 1 interrupt autovector
Exception Vectors
Assignment
2
Bus error
Address error
Divide-by-zero
CHK instruction
Trace
3
3
3
3
4
9-3