Motorola MC68VZ328 User Manual page 123

Table 7-6. DRAM Memory Configuration Register Description (Continued)
Name
REF Refresh Cycle—This value determines the refresh rate for
Bits 4–0 the DRAM controller. The refresh rate can be calculated
using the equation shown in Example 7-1.
The REF value is the time of 1 refresh cycle.
Example 7-1. Calculating REF Field Values for Refresh Times
When CLK = 0, 32 kHz (or 34.8 kHz) is used for refresh control.
• If REF = 0, the refresh rate = 2
• If REF = 1, the refresh rate = 32 kHz.
• If REF = (2 to 15), the refresh rate = 32 kHz / (REF + 1).
When CLK = 1, the system clock is used for refresh control.
• The refresh rate = SYSCLK / (32
Description
×
32 kHz.
×
(REF + 1)).
DRAM Controller
Programming Model
Setting
See description
7-13