Table 7-4. 128 Mbit Sdram-512 (16-Bit) And 1024 (8-Bit) Page Size; Table 7-5. 256 Mbit Sdram-512 (16-Bit) And 1024 (8-Bit) Page Size - Motorola MC68VZ328 User Manual

Motorola mc68vz328 integrated processor user's manual
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DRAM Controller Operation
Table 7-4. 128 Mbit SDRAM—512 (16-Bit) and 1024 (8-Bit) Page Size
SDRAM
A0
A1
Pins
A1/
A2/
VZ Pins
MD
MD
0
1
PA
PA
Row
11
12
Address
Options
PA
PA
Column
1
2
Address
Options
(16-Bit)
PA
PA
Column
0
2
Address
Options
(8-Bit)
Note: X = "don't care"
Table 7-5. 256 Mbit SDRAM—512 (16-Bit) and 1024 (8-Bit) Page Size
SDRAM
A0
A1
Pins
A1/
A2/
VZ Pins
MD
MD
0
1
PA
PA
Row
11
12
Address
Options
PA
PA
Column
1
2
Address
Options
(16-Bit)
PA
PA
Column
0
2
Address
Options
(8-Bit)
Note: X = "don't care"
7-6
A2
A3
A4
A5
A3/
A4/
A5/
A6/
MD
MD
MD
MD
2
3
4
5
PA
PA
PA
PA
13
14
15
16
PA
PA
PA
PA
3
4
5
6
PA
PA
PA
PA
3
4
5
6
A2
A3
A4
A5
A3/
A4/
A5/
A6/
MD
MD
MD
MD
2
3
4
5
PA
PA
PA
PA
13
14
15
16
PA
PA
PA
PA
3
4
5
6
PA
PA
PA
PA
3
4
5
6
MC68VZ328 User's Manual
A6
A7
A8
A9
A7/
A8/
A9/
A10
MD
MD
MD
/MD
6
7
8
9
PA
PA
PA
PA
17
18
20
19
PA
PA
PA
X
7
8
9
PA
PA
PA
PA
7
8
9
1
A6
A7
A8
A9
A7/
A8/
A9/
A10
MD
MD
MD
/MD
6
7
8
9
PA
PA
PA
PA
17
18
20
19
PA
PA
PA
X
7
8
9
PA
PA
PA
PA
7
8
9
1
A10
BS0
A11
BS1
A11
A12/
A13
A15/
/MD
MD
/MD
10
11
12
PA
PA22
PA
PA23
21
10
0
PA22
X
PA23
0
PA22
X
PA23
BS
A10
A11
A12
0
A11
A12
A13
A15
/MD
/MD
/MD
/MD
10
11
12
14
PA
PA
PA
PA
21
22
10
23
0
X
X
PA
23
0
X
X
PA
23
MD
14
BS
1
A16
/MD
15
PA
24
PA
24
PA
24

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