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14.4.7
Non-Integer Prescaler Programming Example
The following steps show how to generate a 3.072 MHz clock frequency from a 16.580608 MHz clock
source.
1. Calculate the divisor:
divisor = 16.580608 MHz ÷ 3.072000 MHz = 5.397333
2. Find the value for the SELECT field in the NIPR. The divisor is between four and eight, so
Table 14-1 on page 14-8 indicates that the SELECT field is 001. The divisor step size for
the selected range is one sixty-fourth.
3. Find the number of steps to program into the STEP VALUE field by subtracting the
minimum divisor from the divisor (5.397333 - 4 = 1.397333) and dividing this value by the
step size, which is one sixty-fourth or 0.015625 (1.397333 ÷ 0.015625 = 89.42). The result
should be rounded to the nearest integer value and converted to the hex equivalent:
89 (decimal) = 59 (hex)
The actual divisor will be 5.390625, which will produce a frequency of 3.075823 MHz
(0.12 percent above the preferred frequency).
Universal Asynchronous Receiver/Transmitter 1 and 2
Programming Model
14-19
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