Motorola MC68VZ328 User Manual page 263

Table 14-4. UART 1 Status/Control Register Description (Continued)
Name
STOP Stop Bit Transmission—This bit controls the number of stop
Bit 9 bits transmitted after a character. This bit has no effect on the
receiver, which expects one or more stop bits.
8/7 8- or 7-Bit—This bit controls the character length. When this
Bit 8 bit is set to 7-bit operation, the transmitter ignores data bit 7
and, when receiving, the receiver forces data bit 7 to 0.
ODEN Old Data Enable—This bit enables an interrupt when the OLD
Bit 7 DATA bit in the URX register is set.
CTSD CTS1 Delta Enable—When this bit is high, it enables an inter-
Bit 6 rupt when the CTS1 pin changes state. When it is low, this
interrupt is disabled. The current status of the CTS1 pin is read
in the UTX register.
RXFE Receiver Full Enable—When this bit is high, it enables an
Bit 5 interrupt when the receiver FIFO is full. This bit resets to 0.
RXHE Receiver Half Enable—When this bit is high, it enables an
Bit 4 interrupt when the receiver FIFO is more than half full. This bit
resets to 0.
RXRE Receiver Ready Enable—When this bit is high, it enables an
Bit 3 interrupt when the receiver has at least 1 data byte in the FIFO.
When it is low, this interrupt is disabled.
TXEE Transmitter Empty Enable—When this bit is high, it enables
Bit 2 an interrupt when the transmitter FIFO is empty and needs
data. When it is low, this interrupt is disabled.
TXHE Transmitter Half Empty Enable—When this bit is high, it
Bit 1 enables an interrupt when the transmit FIFO is less than half
full. When it is low, the TX HALF interrupt is disabled. This bit
resets to 0.
TXAE Transmitter Available for New Data—When this bit is high, it
Bit 0 enables an interrupt if the transmitter has a slot available in the
FIFO. When it is low, this interrupt is disabled. This bit resets to
0.
Universal Asynchronous Receiver/Transmitter 1 and 2
Description
Programming Model
Setting
0 = One stop bit is transmitted
1 = Two stop bits are transmitted
0 = 7-bit transmit-and-receive
character length
1 = 8-bit transmit-and-receive
character length
0 = OLD DATA interrupt is disabled
1 = OLD DATA interrupt is enabled
0 = CTS1 interrupt is disabled
1 = CTS1 interrupt is enabled
0 = RX FULL interrupt is disabled
1 = RX FULL interrupt is enabled
0 = RX HALF interrupt is disabled
1 = RX HALF interrupt is enabled
0 = RX interrupt is disabled
1 = RX interrupt is enabled
0 = TX EMPTY interrupt is disabled
1 = TX EMPTY interrupt is enabled
0 = TX HALF interrupt is disabled
1 = TX HALF interrupt is enabled
0 = TX AVAIL interrupt is disabled
1 = TX AVAIL interrupt is enabled
14-11