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LCD Controller Operation
LFLM
LINE 1
LLP
LLP
LCLK
LD3
LD2
LD1
LD0
LD1
LD0
LD0
Figure 8-2. LCD Interface Timing for 4-, 2-, and 1-Bit Data Widths
8.2.2
Controlling the Display
The LCD controller is designed to drive single-screen monochrome STN LCD panels with up to 640
pixels in black-and-white display and 320
×
320
240 for gray level display may cause flickering due to a slow refresh rate. The best efficiency is
achieved when the screen width is a multiple of the DMA controller's 16-bit bus width.
8.2.2.1
Format of the LCD Screen
The screen width and height of the LCD panel are programmable through software. Figure 8-3 on page 8-5
illustrates the relationship between the portion of a large graphics file displayed on the screen and the
actual page. The units in the figure are measured in pixel counts.
8-4
LINE 2
LINE 3
LINE 4
1
2
3
4-bit LCD data bus (PBSIZ = 10)
[0,0]
[4,0]
[8,0]
[1,0]
[5,0]
[9,0]
[2,0]
[6,0]
[10,0]
[3,0]
[7,0]
[11,0]
2-bit LCD data bus (PBSIZ = 01)
[0,0]
[2,0]
[4,0]
[1,0]
[3,0]
[5,0]
1- bit LCD data bus (PBSIZ = 00)
[0,0]
[1,0]
[2,0]
×
240 pixels in gray level display. A screen size larger than
MC68VZ328 User's Manual
LINE n
20
21
m-1
[76,0]
[80,0]
[m-8,0]
[77,0]
[81,0]
[m-7,0]
[78,0]
[82,0]
[m-6,0]
[79,0]
[83,0]
[m-5,0]
[38,0]
[40,0]
[m-4,0]
[39,0]
[41,0]
[m-3,0]
[19,0]
[20,0]
[m-2,0]
LINE 1
m
[m-4,0]
[m-3,0]
[m-2,0]
[m-1,0]
[m-2,0]
[m-1,0]
[m-1,0]
×
512
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