Quad-Spi Interface And Octo-Spi Interface (Quadspi/Octospi); Table 69. Qspi_Sm_0; Table 70. Qspi_Sm_1 - ST STM32L4 Series User Manual

SM CODE
Error reporting
Fault detection time
Addressed fault model
Dependency on Device configuration
Initialization
Periodicity
Test for the diagnostic
Multiple-fault protection
Recommendations and known limitations
3.6.17

Quad-SPI interface and Octo-SPI interface (QUADSPI/OCTOSPI)

Note: For this document's scope, Octo-SPI interface includes the OCTOSPIM.
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
Addressed fault model
Dependency on Device configuration
Initialization
Periodicity
Test for the diagnostic
Multiple-fault protection
Recommendations and known limitations
SM CODE
Description
Ownership
Detailed implementation
Error reporting
Fault detection time
UM2305 - Rev 10
Refer to functional documentation
ECC bits are checked during memory reading.
Permanent/transient
FSMC interface is available only on selected part numbers.
None
Continuous
Not applicable
FSMC_SM_2: Periodic read-back of FSMC configuration registers
This method has negligible efficiency in detecting hardware random failures affecting the
FSMC interface. It can be part of End user safety concept because addressing memories
outside STM32L4 and STM32L4+ Series MCU.
Table 69. QSPI_SM_0
Periodic read-back of OCTOSPI configuration registers
End user
This method must be applied to OCTOSPI configuration registers.
Detailed information on the implementation of this method can be found in
Section 3.6.14 Extended interrupt and events controller
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Refer to NVIC_SM_0
Table 70. QSPI_SM_1
Protocol error signals including hardware CRC
ST
OCTOSPI communication module embeds protocol error checks (like overrun, underrun,
timeout etc.), conceived to detect communication-related abnormal conditions. These
mechanisms are able anyway to detect a percentage of hardware random failures affecting
the module itself.
Error flag raise and optional interrupt event generation
Depends on peripheral configuration (for example baud rate). Refer to functional
documentation.
Hardware and software diagnostics
FSMC_SM_3
QSPI_SM_0
(EXTI).
QSPI_SM_1
UM2305
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