Toshiba T3200 User Manual page 160

B.5 I/O Decode Control
Address lines SA9 and SA8-SAS are used to generate the I/O
port select signal.
Address on the XA lines are decoded for I/O port chip select
if it is not in the DMA cycle.
The following table shows the address assignment to each I/O
port chip.
TABLE B-3 Address Assignment to the I/O Port
Address Signal Name Descri ption
OO*H-01*H DMA1CS Slave DMAC select
02*H-03*H PIC1CS Master Interrupt Controller Select
04*H-05*H PITCS Timer Chip Select
06*H-07*H PPICS
Peripheral 1/0 Select
08*H-09*H PREGCS Reqister Select within the GA
OA*H-OB*H PIC2CS Slave Interrupt Controller Select
OC*H-OD*H DMA2CS Master DMAC Select
OE*H-OF*H C287 NDP reset
B-10