Toshiba T3200 User Manual page 156

Pin 110
Signal Name
Description
Data read strobe signal to the real timer.
41
0 DSTRB
This signal becomes active when read operation
to the 1/0 port address 071 H is executed.
This signal is active low.
42 I
SA14
Address line bit 14.
43 I
SA15 Address line bit 15.
44 I
DACK6
DMA acknowledge signal from channel 6.
45 I DACK2 DMA acknowledge signal from channel 2.
46 I DACK4 DMA acknowledge signal from channel4.
47 I DACKO DMA acknowledge signal from channel O.
48
I
DACK7 DMA acknowledge signal from channel7.
49 I DACK3 DMA acknowledge signal from channel 3.
50
0
IRQ13 Interrup_t request signal when NDP error occurs.
System occupation request signal from the
51
I
MASTER external processor.
This signal is active low.
52 KBCCS2
Chip select signal forthe external 101 keyboard
controller.
53 Vcc
+5V
54 I
NDPER NDP error signal.
55
I NDPBS NDP busy signal.
This signal indicates which of the two keyboard
controllers (the internal one or excternal one) is
56 0 KBSEL2 selected.
When this signal is "1"
I
it shows that the external
controller is selected.
57 I SA9 Address line bit 9.
This signal is ORed signal of CPHLDA and
58
0 DMACK MASTER signals. This signal is low except in the
DMA mode.
59 0 NDPRST
Reset command to the NDP.
This signal is active high.
Chip select signal to the slave interrupt controller
60
0
PIC2CS
(U8259A). This signal is active when the 1/0 port
address is OA*H-OB*H.
This is active low.
Chip select signal to the master DMAC (U8237).
61 0 DMA2CS This signal is active when the 1/0 port address is
OC*H-OD*H. This is active low.
62 0 HCS0 HDD address decode signal 0 (not used).
63
I MDSPK Buzzer sound siqnal from the MODEM card.
B-6