Toshiba T3200 User Manual page 147

A.4 DATA BUS CONTROL
This circuit controls the data bus between the CPU and I/O
port or the CPU and Memory. 8/16 bit conversion is
performed by this circuit.
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FIGURE A-2 Data Flow among the CPU, I/O Port, and Memory
A.4.1 Word access
When the I/O port connected to the data bus is word
oriented, no data conversion is performed.
Low bank
High bank
B
l1li(
(refer to Figure A-2)
In this case, read/ write cycle is completed in three CPU
cycles. (No wait cycle request is included.)
A-7