Toshiba T3200 User Manual page 146

Pin
I/O Signal Name
Description
This signal is a refresh address (the lowest bit).
79
I REFADO
It is output as SAO.
This signal is also used as a clock signal for the
internal refresh address counter.
This signal is to output the refresh address to the
80 I REFQ1
system bus.
This signal outputs the content of the refresh
address counter, when it is low.
Slave DMAC address strobe signal.
81 I
ADSTB1 This signal is used to latch the DMA address
which has been output on the data bus,.
CPU data bus from Ito the CPU.
82 I/O D15
(D15-D8 are in the high bank, and D7-DO are in
the low bank)
CPU data bus bit 15.
83 I/O D14
CPU data bus bit 14.
84 I/O
D13 CPU data bus bit 13.
85 I/O D12
CPU data bus bit 12.
86 I/O D11
CPU data bus bit 11.
87
I/O D10 CPU data bus bit 10.
88 I/O D9
CPU data bus bit 9.
89 I/O D8
CPU data bus bit 8.
90 GND Ground
Master DMAC address strobe signal.
91 I ADSTB2 This signal generates DMA address.
It is active high.
92 I/O D7 CPU data bus bit 7.
93 I/O
D6 CPU data bus bit 6.
94 I/O D5 CPU data bus bit 5.
95 I/O D4 CPU data bus bit 4.
96 I/O D3 CPU data bus bit 3.
97 I/O
D2 CPU data bus bit 2.
98 I/O D1
CPU data bus bit 1.
99 I/O
DO CPU data bus bit
o.
100
Not used.
A-6