Toshiba T3200 User Manual page 148

A.4.2 Byte access
Following are the cases of byte access.
The I/O port is connected to the low bank of the data bus.
- Word Read Operation
The 1st data byte (even address data) transferred from C is
latched in the buffer 3 temporarily.
The following second byte data (odd address data) is
transferred to the DIS-D8 (
B )
through the trsansceiver 4.
At this time, the 1st data byte in the buffer 3 is enabled
to be output to the data bus D7-DO ( A ), thus, l6-bit data
is transferred to the
cpu.
The transceiver 1 is disabled
while the 2nd data byte is being transferred.
1st data byte
C--~-'~3
-.A
2nd data byte
C
-4
.. B
(refer to Figure A-2)
- Word Write Operation
l6-bit write data from the
cpu
is output to
A
and
B
through
the data bus DIS-DO.
The low bank data D8-DO is transferred to C through the
transceiver 1 as the 1st data byte.
The high bank data DlS-19 is transferred to
C
through the
transceiver 2 and trnasceiver 4 as the 2nd byte.
1st data byte
A--~-~1
"C
2nd data byte
B -'2
-'4
-.C
(refer to Figure A-2)
The transceiver
1
is disabled during the 2nd byte transfer.
The buffer 3 is disabled while write operation is being
executed.
This word/ byte conversion occupies 12 system clock cycle
time.
A-8