RESET
INTERRUPT CONTROL CYCLE 1
INTERRUPT CONTROL CYCLE 2
FETCH
DECODE
EXECUTE
STOP CYCLE COUNT
= INTERRUPT
IRESET
n
= NORMAL INSTRUCTION WORD
nA, nB, nC = INSTRUCTIONS IN RESET ROUTINE
STOP
= INTERRUPT INSTRUCTION WORD
Figure 7-19 STOP Instruction Sequence Recovering with RESET
7 - 42
STOP PROCESSING STATE
PROCESSOR ENTERS
RESET STATE
n3
n4
—
—
n2
STOP
—
—
n1
n2
STOP
—
1
2
3
4
CLOCK STOPPED
PROCESSING STATES
PROCESSOR LEAVES RESET STATE
nop
nA
nB
nC
nop
nop
nA
nB
nop
nop
nop
nA
MOTOROLA
nD
nE
nC
nD
nB
nC