Motorola DSP56000 Manual page 272

Table A-1 Instruction Description Notation (Continued)
PC Program Counter Register (16 Bits)
MR Mode Register (8 Bits)
CCR Condition Code Register (8 Bits)
SR Status Register = MR:CCR (16 Bits)
OMR Operating Mode Register (8 Bits)
LA Hardware Loop Address Register (16 Bits)
LC Hardware Loop Counter Register (16 Bits)
SP System Stack Pointer Register (6 Bits)
SSH Upper Portion of the Current Top of the Stack (16 Bits)
SSL Lower Portion of the Current Top of the Stack (16 Bits)
SS System Stack RAM = SSH: SSL (15 Locations by 32 Bits)
ea Effective Address
eax Effective Address for X Bus
eay Effective Address for Y Bus
xxxx Absolute Address (16 Bits)
xxx Short Jump Address (12 Bits)
aa Absolute Short Address (6 Bits, Zero Extended)
pp I/O Short Address (6 Bits, Ones Extended)
<. . .> Specifies the Contents of the Specified Address
X: X Memory Reference
Y: Y Memory Reference
L: Long Memory Reference = X:Y
P: Program Memory Reference
A - 6
NOTATION
Program Control Unit Registers Operands
Address Operands
INSTRUCTION SET DETAILS MOTOROLA