Motorola DSP56000 Manual page 376

24-bit digital signal processor
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JCLR
Operation:
If S[n]=0, then xxxx PC
else PC+1 PC
If S[n]=0, then xxxx
else PC+1
If S[n]=0, then xxxx
else PC+1
If S[n]=0, then xxxx
else PC+1
If S[n]=0, then xxxx
else PC+1
If S[n]=0, then xxxx
else PC+1
If S[n]=0, then xxxx
else PC+1
Description: Jump to the 16-bit absolute address in program memory specified in the
instruction's 24-bit extension word if the n
be tested is selected by an immediate bit number from 0–23. If the specified memory bit
is not clear, the program counter (PC) is incremented and the absolute address in the
extension word is ignored. However, the address register specified in the effective
address field is always updated independently of the state of the n
ister indirect addressing modes may be used to reference the source operand S. Abso-
lute Short and I/O Short addressing modes may also be used.
A - 110
INSTRUCTION DESCRIPTIONS
Jump if Bit Clear
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
th
bit of the source operand S is clear. The bit to
INSTRUCTION SET DETAILS
Assembler Syntax:
JCLR
#n,X:ea,xxxx
JCLR
#n,X:aa,xxxx
JCLR
#n,X:pp,xxxx
JCLR
#n,Y:ea,xxxx
JCLR
#n,Y:aa,xxxx
JCLR
#n,Y:pp,xxxx
JCLR
#n,S,xxxx
th
JCLR
bit. All address reg-
MOTOROLA

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