Motorola DSP56000 Manual page 282

24-bit digital signal processor
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S (Scaling Bit)
L (Limit Bit)
E (Extension Bit)
A - 16
CONDITION CODE COMPUTATION
The scaling bit (S) is used to detect data growth, which is
required in Block Floating Point FFT operation. Typically, the bit
is tested after each pass of a radix 2 decimation-in-time FFT
and, if it is set, the appropriate scaling mode should be activated
in the next pass. The Block Floating Point FFT algorithm is
described in the Motorola application note APR4/D, "Implemen-
tation of Fast Fourier Transforms on Motorola's DSP56000/
DSP56001 and DSP96002 Digital Signal Processors." This bit is
computed according to the logical equations below when an
instruction or a parallel move moves the result of accumulator A
or B to XDB or YDB. It is a "sticky" bit, cleared only by an instruc-
tion that specifically clears it.
The following logical equations are used to compute the scaling
bit based upon the scaling mode bits:
If
S1=0 and S0=0 (no scaling)
then S = (A46 XOR A45) OR (B46 XOR B45)
If
S1=0 and S0=1 (scale down)
then S = (A47 XOR A46) OR (B47 XOR B46)
If
S1=1 and S0=0 (scale up)
then S = (A45 XOR A44) OR (B45 XOR B44)
If
S1=1 and S0=1 (reserved)
then the S flag is undefined.
where Ai and Bi means bit i in accumulator A or B.
Set if the overflow bit V is set or if an instruction or a parallel
move causes the data shifter/limiters to perform a limiting opera-
tion. Not affected otherwise. This bit is latched and must be
reset by the user.
Cleared if all the bits of the signed integer portion of the A or B
result are the same – i.e., the bit patterns are either 00 . . . 00 or
11 . . . 11. Set otherwise. The signed integer portion is defined
by the scaling mode as shown in the following table:
INSTRUCTION SET DETAILS
MOTOROLA

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