Overview; Dsp56K Block Diagram - Motorola DSP56000 Manual

PERIPHERAL
MODULES
24-Bit
56K Mod-
INTERNAL
DATA
BUS
SWITCH
PLL
PROGRAM
INTERRUPT
CLOCK
CONTROLLER
GENERATOR
All of the PCU registers are read/write to facilitate system debugging. Although none of
the registers are 24 bits, they are read or written over 24-bit buses. When they are read,
the least significant bits (LSBs) are significant, and the most significant bits (MSBs) are
zeroed as appropriate. When they are written, only the appropriate LSBs are significant,
and the MSBs are written as don't care.
5 - 4

OVERVIEW

PROGRAM
RAM/ROM
EXPANSION
YAB
ADDRESS
XAB
GENERATION
PAB
UNIT
YDB
XDB
PDB
GDB
PROGRAM
PROGRAM
ADDRESS
DECODE
GENERA TOR
CONTROLLER
Program Control Unit
MODC/NMI
MODB/IRQB
MODA/IRQA
RESET
Figure 5-2 DSP56K Block Diagram
PROGRAM CONTROL UNIT
X MEMORY Y MEMORY
RAM/ROM RAM/ROM
EXPANSION EXPANSION
DATA ALU
24X24 + 56 → 56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXPANSION
AREA
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
OnCE™
16 BITS
24 BITS
MOTOROLA