Motorola DSP56000 Manual page 453

24-bit digital signal processor
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Y:
Note: This parallel data move is considered to be a move-type instruction. Due to
instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changed with this
instruction, the new contents may not be available for use until the second following
instruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restrictions on
page A-page 310.
Example:
:
EOR X0,B
#$123456,A
:
Before Execution
A
$FF:FFFFFF:FFFFFF
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $FF:FFFFFF:FFFFFF. The execution of the parallel move portion of the instruc-
tion, #$123456,A, moves the 24-bit immediate value $123456 into the 24-bit A1 register,
then sign extends that value into the A2 portion of the accumulator, and zeros the lower
24-bit A0 portion of the accumulator.
Condition Codes:
15
14
13
LF
DM
T
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move.
MOTOROLA
INSTRUCTION DESCRIPTIONS
Y Memory Data Move
;exclusive OR X0 and B, update A accumulator
12
11
10
9
8
**
S1
S0
I1
I0
MR
INSTRUCTION SET DETAILS
After Execution
A
$00:123456:000000
7
6
5
4
3
S
L
E
U
N
CCR
Y:
2
1
0
Z
V
C
A - 187

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