Motorola DSP56000 Manual page 414

24-bit digital signal processor

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Description: Load the updated address into the destination address register D. The

source address register and the update mode used to compute the updated address are

specified by the effective address (ea). Note that the source address register speci-

fied in the effective address is not updated. All update addressing modes may be

Note: This instruction is considered to be a move-type instruction. Due to instruction

pipelining, if an AGU register (Mn, Nn, or Rn) is directly changed with this instruction, the

new contents may not be available for use until the second following instruction. See the

restrictions discussed in A.9.6 - R, N, and M Register Restrictions on page A-310.

LUA (R0)+N0,R1

Before Execution

Explanation of Example: Prior to execution, the 16-bit address register R0 contains the

value $0003, the 16-bit address register N0 contains the value $0005, and the 16-bit

address register R1 contains the value $0004. The execution of the LUA (R0)+N0,R1

instruction adds the contents of the R0 register to the contents of the N0 register and

stores the resulting updated address in the R1 address register. Normally N0 would be

added to R0 and deposited in R0. However, for an LUA instruction, the contents of both

the R0 and N0 address registers are not affected.

INSTRUCTION DESCRIPTIONS

Load Updated Address

;update R1 using (R0)+N0

INSTRUCTION SET DETAILS

Assembler Syntax:

After Execution

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