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LSR
Condition Codes:
15
14
13
LF
DM
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
N — Always cleared
Z— Set if bits 47–24 of A or B result are zero
V — Always cleared
C — Set if bit 24 of A or B was set prior to instruction execution
Instruction Format:
LSR D
Opcode:
23
Instruction Fields:
D d
A 0
B 1
Timing: 2+mv oscillator clock cycles
Memory: 1+mv program words
MOTOROLA
INSTRUCTION DESCRIPTIONS
Logical Shift Right
12
11
10
9
T
**
S1
S0
I1
MR
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION
INSTRUCTION SET DETAILS
8
7
6
5
4
I0
S
L
E
U
CCR
8
7
0
0
1
LSR
3
2
1
0
N
Z
V
C
4
3
0
0
d
0
1
1
A - 147
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