Bit Weighting And Alignment Of Operands - Motorola DSP56000 Manual

24-bit digital signal processor
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-47
or 1 - 2
. These limitations apply to all data stored in memory and to data stored in the
Data ALU input buffer registers. The extension registers associated with the accumula-
tors allow word growth so that the most positive number that can be used is approxi-
mately 256 and the most negative number is approximately -256. When the accumulator
extension registers are in use, the data contained in the accumulators cannot be stored
exactly in memory or other registers. In these cases, the data must be limited to the most
positive or most negative number consistent with the size of the destination and the sign
of the accumulator (the most significant bit (MSB) of the extension register).
To maintain alignment of the binary point when a word operand is written to accumulator
A or B, the operand is written to the most significant accumulator register (A1 or B1), and
its MSB is automatically sign extended through the accumulator extension register. The
least significant accumulator register is automatically cleared. When a long-word oper-
and is written to an accumulator, the least significant word of the operand is written to the
least significant accumulator register A0 or B0 and the most significant word is written to
DATA ALU
WORD OPERAND
X1, X0
Y1, Y0
A1, A0
B1, B0
LONG - WORD OPERAND
X1:X0 = X
Y1:Y0 = Y
A1:A0 = A10
B1:B0 = B10
ACCUMULATOR A OR B
Figure 3-7 Bit Weighting and Alignment of Operands
3 - 12
DATA REPRESENTATION AND ROUNDING
0
–2
0
–2
*
8
0
–2
2
A2, B2
SIGN EXTENSION
OPERAND
DATA ARITHMETIC LOGIC UNIT
–23
2
–24
2
–24
2
A1, B1
–47
2
–47
2
A0, B0
ZERO
MOTOROLA

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