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5. Compute final results.
Thus, based upon the assumptions given for Table A-6 and those listed in the problem
statement for Example 1, the instruction
MACR –X0,X0,A
will require
and will execute in
Note that if a similar calculation were to be made for a MOVEC, MOVEM, MOVEP, or
one of the bit manipulation (BCHG, BCLR, BSET, or BTST) instructions, the use of Table
A-7 would no longer be appropriate. For one of these cases, the user would refer to
Table A-8, Table A-9, or Table A-10, respectively.
Example 17: Jump Instruction
Problem: Calculate the number of 24-bit instruction program words and the number of
oscillator clock cycles required for the instruction
JLC (R2+N2)
where
Operating Mode Register (OMR)
Bus Control Register (BCR)
R2 Address Register
N2 Address Register
Solution: To determine the number of instruction program words and the number of
oscillator clock cycles required for the given instruction, the user should perform the fol-
lowing operations:
1. Look up the number of instruction program words and the number of oscillator clock
cycles required for the opcode-operand portion of the instruction in Table A-6.
According to Table A-6, the Jcc instruction will require (1+ea) instruction program words
and will execute in (4+jx) oscillator clock cycles. The term "ea'' represents the number of
MOTOROLA
INSTRUCTION TIMING
X1,X:(R6)–
(1+mv)
= (1+0)
= 1
instruction program word
= (2+mv)
= (2+ea+axy)
= (2+ea+wy)
= (2+0+1)
oscillator clock cycles.
=
3
= $02 (normal expanded memory map),
= $2246,
= $1000 (external P memory), and
= $0037.
INSTRUCTION SET DETAILS
Y0,Y:(R0)+
A - 297
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