Offset Register Files (Nn); Dsp56K Block Diagram - Motorola DSP56000 Manual

PERIPHERAL
MODULES
24-Bit 56K
Module
INTERNAL
DATA
BUS
SWITCH
PLL
PROGRAM
INTERRUPT
CLOCK
CONTROLLER
GENERATOR

4.2.2 Offset Register Files (Nn)

Each of two offset register files shown in Figure 4-2 consists of four 16-bit registers. The
two files contain offset registers N0 - N3 and N4 - N7, which contain either data or offset
values used to update address pointers. Each offset register can be read or written by the
4 - 4
AGU ARCHITECTURE
PROGRAM
RAM/ROM
EXPANSION
YAB
ADDRESS
XAB
GENERATION
PAB
UNIT
YDB
XDB
PDB
GDB
PROGRAM
PROGRAM
ADDRESS
DECODE
GENERA TOR
CONTROLLER
Program Control Unit
MODC/NMI
MODB/IRQB
MODA/IRQA
RESET
Figure 4-1 DSP56K Block Diagram
ADDRESS GENERATION UNIT
X MEMORY Y MEMORY
RAM/ROM RAM/ROM
EXPANSION EXPANSION
DATA ALU
24X24 + 56 → 56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXPANSION
AREA
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
OnCE™
16 BITS
24 BITS
MOTOROLA