Motorola DSP56000 Manual page 394

JSCLR
Instruction Format:
JSCLR #n,S,xxxx
Opcode:
23
0 0 0 0
Instruction Fields:
#n=bit number=bbbbb,
S=source register=DDDDDD,
xxxx=16-bit Absolute Address in extension word
Source Register
4 registers in Data ALU
8 accumulators in Data ALU
8 address registers in AGU
8 address offset registers in AGU
8 address modifier registers in AGU
8 program controller registers
See Section A.10 and Table A-18 for specific register encodings.
A - 128
INSTRUCTION DESCRIPTIONS
Jump to Subroutine if Bit Clear
16 15
1 0 1 1 1 1 D
ABSOLUTE ADDRESS EXTENSION
D D D D D D
0 0 0 1 D D
0 0 1 D D D
0 1 0 T T T
0 1 1 N N N
1 0 0 F F F
1 1 1 G G G
INSTRUCTION SET DETAILS
8 7
D D D D D 0 0
Bit Number bbbbb
JSCLR
0
0 b b b b b
00000
•
10111
MOTOROLA