Clr - Motorola DSP56000 Manual

24-bit digital signal processor
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CLR

Operation:
0
D (parallel move)
Description: Clear the destination accumulator. This is a 56-bit clear instruction.
Example:
:
CLR A
#$7F,N
:
Before Execution
A
$12:345678:9ABCDE
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $12:345678:9ABCDE. The execution of the CLR A instruction clears the 56-bit A
accumulator to zero.
Condition Codes:
15
14
13
DM
LF
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
E — Always cleared
U — Always set
N — Always cleared
Z— Always set
V — Always cleared
A - 70
INSTRUCTION DESCRIPTIONS
Clear Accumulator
;clear A, set up N0 addr. reg.
12
11
10
9
T
**
S1
S0
I1
MR
INSTRUCTION SET DETAILS
Assembler Syntax:
CLR D (parallel move)
After Execution
A
$00:000000:000000
8
7
6
5
4
I0
S
L
E
U
CCR
CLR
3
2
1
0
N
Z
V
C
MOTOROLA

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