Jsr Second Instruction Of A Fast Interrupt - Motorola DSP56000 Manual

EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)
MAIN
PROGRAM
n1
n2
INTERRUPT CONTROL CYCLE 1
INTERRUPT CONTROL CYCLE 2
FETCH
DECODE
EXECUTE
INSTRUCTION CYCLE COUNT
i = INTERRUPT
ii = INTERRUPT INSTRUCTION WORD
n = NORMAL INSTRUCTION WORD
Figure 7-12 JSR Second Instruction of a Fast Interrupt
7 - 32
FAST INTERRUPT
VECTOR
ii1
JSR
(a) Instruction Fetches from Memory
INTERRUPT SYNCHRONIZED AND
RECOGNIZED AS PENDING
i
i
n1 ii1 JSR —
n1 ii1 JSR NOP
n1 ii1 JSR
1 2 3 4 5
(b) Program Controller Pipeline
PROCESSING STATES
INTERRUPTS RE-ENABLED
ii3 ii4 ii5 iin
ii3 ii4 ii5 ii6
NOP ii3 ii4 ii5
6 7 8 9 10
LONG INTERRUPT
SUBROUTINE
ii3
ii4
ii5
ii6
iin
RTI
RTI — n2
iin RTI NOP n2
ii6 iin RTI NOP n2
11 12 13 14 15
MOTOROLA