Reverse-Carry Modifier (Mn=$0000) - Motorola DSP56000 Manual

24-bit digital signal processor
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For example, to create a circular buffer of 32 stages, M is chosen as 32 and the lower ad-
dress boundary must have its 5 least significant bits equal to zero (2
The Mn register is loaded with the value $801F. The lower boundary may be chosen as
0, 32, 64, 96, 128, 160, etc. The upper boundary of the buffer is then the lower boundary
plus 31.
The address pointer is not required to start at the lower address boundary and may begin
anywhere within the defined modulo address range (between the lower and upper bound-
aries). If the address register pointer increments past the upper boundary of the buffer
(base address plus M-1) it will wrap around to the base address. If the address decre-
ments past the lower boundary (base address) it will wrap around to the base address
plus M-1. If an offset Nn is used in the address calculations, it is not required to be less
than or equal to M for proper modulo addressing since multiple wrap around is supported
for (Rn)+Nn, (Rn)-Nn and (Rn+Nn) address updates (multiple wrap-around cannot occur
with (Rn)+, (Rn)- and -(Rn) addressing modes).
The multiple wrap-around address modifier is useful for decimation, interpolation and
waveform generation since the multiple wrap-around capability may be used for argument
reduction.
4.4.2.3

Reverse-Carry Modifier (Mn=$0000)

Reverse carry is selected by setting the modifier register to zero (see Table 4-2). The ad-
dress modification is performed in hardware by propagating the carry in the reverse
direction — i.e., from the MSB to the LSB. Reverse carry is equivalent to bit reversing the
contents of Rn (i.e., redefining the MSB as the LSB, the next MSB as bit 1, etc.) and the
offset value, Nn, adding normally, and then bit reversing the result. If the + Nn addressing
mode is used with this address modifier and Nn contains the value 2
this addressing modifier is equivalent to bit reversing the k LSBs of Rn, incrementing Rn
by 1, and bit reversing the k LSBs of Rn again. This address modification is useful for ad-
dressing the twiddle factors in 2k-point FFT addressing and to unscramble 2
data. The range of values for Nn is 0 to + 32K (i.e., Nn=2
dressing for FFTs up to 65,536 points.
To make bit-reverse addressing work correctly for a 2
dures must be used:
1. Set Mn=0; this selects reverse-carry arithmetic.
(k–1)
2. Set Nn=2
4 - 22
ADDRESSING
.
ADDRESS GENERATION UNIT
k
= 32, thus k = 5).
(k–1)
(a power of two),
15
), which allows bit-reverse ad-
k
point FFT, the following proce-
MOTOROLA
k
-point FFT

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