Jscc - Motorola DSP56000 Manual

JScc

Operation:
If cc, then SP+1 SP; PC SSH; SR SSL; 0xxx PC
else PC+1 PC
If cc, then SP+1 SP; PC SSH; SR SSL; ea PC
else PC+1 PC
Description: Jump to the subroutine whose location in program memory is given by the
instruction's effective address if the specified condition is true. If the specified condition is
true, the address of the instruction immediately following the JScc instruction (PC) and
the system status register (SR) are pushed onto the system stack. Program execution
then continues at the specified effective address in program memory. If the specified
condition is false, the program counter (PC) is incremented, and any extension word is
ignored. However, the address register specified in the effective address field is always
updated independently of the specified condition. All memory alterable addressing
modes may be used for the effective address. A fast short jump addressing mode may
also be used. The 12-bit data is zero extended to form the effective address. The term
"cc" may specify the following conditions:
CC (HS) — carry clear (higher or same)
CS (LO) — carry set (lower)
EC — extension clear
EQ — equal
ES — extension set
GE — greater than or equal
GT — greater than
LC — limit clear
LE — less than or equal
LS — limit set
LT — less than
MI — minus
NE — not equal
NR — normalized
PL — plus
NN — not normalized
A - 118
INSTRUCTION DESCRIPTIONS
Jump to Subroutine Conditionally
"cc" Mnemonic
INSTRUCTION SET DETAILS
JScc
Assembler Syntax:
JScc xxx
JScc ea
Condition
C=0
C=1
E=0
Z=1
E=1
⊕
N
V=0
⊕
Z+(N V)=0
L=0
⊕
Z+(N V)=1
L=1
⊕
N V=1
N=1
Z=0
•
E)=1
Z+(U
N=0
•
Z+(U E)=0
MOTOROLA