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2. Perform address manipulation using instructions
which employ general registers for operands
3. Modify addresses by program means without
alteration of the instruction stream
4. Operate independently of the location of data
areas by directly using addresses received from
other programs
The address used to refer to storage either is
contained in a register designated by the R field in
the instruction or is calculated from a base address,
index, and displacement, designated by the B, X,
and D fields, respectively, in the instruction.
For purposes of describing the execution of
instructions, operands are designated as first and
second operands and, in some cases, third
operands.
In general, two operands participate in an
instruction execution, and the result replaces the
first operand. An exception is instructions with
"store" in the instruction name, other than STORE
THEN AND SYSTEM MASK and STORE THEN
OR SYSTEM MASK, where the result replaces the
second operand. Except when otherwise stated, the
contents of all registers and storage locations
participating in the addressing or execution part of
an operation remain unchanged.
Instruction Format
An instruction is one, two, or three halfwords in
length and must be located in storage on a
halfword boundary. Each instruction is in one of
six basic formats: RR, RX, RS, SI, S, and SS, with
two variations of SS. (See the figure "Basic
Instruction Formats.
I')
Some instructions contain fields that vary slightly
from the basic format, and in some instructions the
operation performed does not follow the general
rules stated in this section. All of these exceptions
are explicitly identified in the individual instruction
descriptions.
The format names indicate, in general terms, the
classes of operands which participate in the
operation:
• RR denotes a register-and-register operation.
• RX denotes a register-and-indexed-storage
operation.
• RS denotes a register-and-storage operation.
• SI denotes a storage-and-immediate operation.
• S denotes an operation using an implied operand
and storage.
• SS denotes a storage-and-storage operation.
5-2
IBM 4300 Processors Principles of Operation
RR Format
Op Code
I
R 1
R2
o
8
12
15
RX Format
o
8
12
16
20
31
RS Format
o
8
12
16
20
31
SI Format
Op Codel
o
8
16
20
31
S Format
Op Code
o
16
20
31
SS Format
~------r--------~--~~/
Op Code/
L
B1
D1
~-------~------~--~-/
B2
D~J
o
8
16
20
32
36
47
I
I I /-""' - -1
~I --D~J
~O_p_C_o_d_e-,-_L_1---L_L 2----''--B_1 -L-_~ 1
B 2
/
o
8
12
16
20
32
36
47
Basic Instruction Formats
The first byte or, in the S format, the first two
bytes of an instruction contain the op code. For
some instructions in the S format, all or a portion
of the second byte is ignored.
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