Load And Test; Load Complement - IBM 4300 Manual

Programming Notes
1. With short and long operands, the halve
operation is identical to a divide operation with
the number 2 as divisor. Similarly, the result of
HDR is identical to that of MD or MDR with
one-half as a multiplier. No multiply operation
corresponds to HER, since no multiply
operation produces short results.
The result of HALVE is zero only when the
second-operand fraction is zero, or when
exponent underflow occurs with the
exponent-underflow mask set to zero. A
fraction with zeros in every bit position, except
for a one in the rightmost bit position, does not
become zero after the right shift. This is
because the one bit is preserved in the
guard-digit position and becomes the leftmost
bit after normalization of the result.
LOAD
[RR, Short Operands]
o
8
12 15
LE [RX, Short Operands]
o
8
12
16
20 31
LOR R1,R2 [RR, Long Operands]
128 1
R1 R2
o
8 12 15
LO [RX, Long Operands]
o
8
12
16
20 31
The second operand is placed unchanged in the
first-operand location.
The
R
1
and R2 fields must designate register 0,
2, 4, or 6; otherwise, a specification exception is
recognized.
Condition Code: The code remains unchanged.
9-10 IB M 4300 Processors Principles of Operation
Program Exceptions:
Access (fetch, operand 2 of LE and LD only)
Specification
LOAD AND TEST
[RR, Short Operands]
o
8
12 15
[RR, Long Operands]
o
8
12
15
The second operand is placed unchanged in the
first-operand location, and its sign and magnitude
are tested to determine the setting of the condition
code.
The R
1
and R2 fields must designate register 0,
2, 4, or 6; otherwise, a specification exception is
recognized.
Resulting Condition Code:
°
Result fraction is zero
1 Result is less than zero
2
Result is greater than zero
3
Program Exceptions:
Specification
Programming Note
When the same register is specified as the
first-operand and second,...operand location, the
operation is equivalent to a test without data
movement.
LOAD COMPLEMENT
LeER R1,R2
[RR, Short Operands]
o
8
12 15