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IBM 4300 Manual page 260

Processors principles of operation for ecps: vse mode
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Location 4891
Immediate byte
Result:
0100 00112
111111102
0100 00102
The resulting byte, with bit 7 set to zero, is
stored back in location 4891. Condition code 1 is
set.
BRANCH AND LINK (BAL, BALR)
The BRANCH AND LINK instructions are
commonly used to branch to a subroutine with the
option of later returning to the main instruction
sequence. For example, assume that you wish to
branch to a subroutine at storage address 1160.
Also assume:
The contents of register 2 are not significant.
Register 5 contains 00 00 11 50.
Address 00 00 C6 contains the BAL instruction so that 00
00 CA is the address of the next sequential inst;uction.
The format of the BAL instruction is:
Machine Format
Op Code
45
2
o
Assembler Format
Op Code
Rl,D2(X2,B2)
BAL
2,X
1
l0
1
(0,5)
After the instruction is executed:
Register
2
(bits 8-31) contains 00 00 CA.
PSW bits 40-63 contain 00 11 60.
The programmer can return to the main
instruction sequence at any time with a BRANCH
ON CONDITION (BCR) instruction that specifies
register
2
and a mask of 15
10 ,
provided that
register
2
has not meanwhile been disturbed.
The BALR instruction with the R2 field set to
zero may be used to load a register for use as a
base register. For example, in the assembler
language, the sequence of statements:
BALR
15,0
USING
*,15
tells the assembler program that register 15 is to be
used as the base register in assembling this program
and that, when the program is executed, the
address of the next sequential instruction following
the BALR will be placed in the register. (The
USING statement is an "assembler instruction" and
is thus not a part of the object program.)
As another example, BALR 6,0 may be used to
preserve the current condition code in bits
2
and 3
of register 6 for future inspection.
Note that, in all three examples, a value of zero
in the X 2 or R2 field indicates that the
corresponding function is not performed; it does
not refer to register O. Register 0 can be
designated by the Rl field, however.
BRANCH ON CONDITION (BC, BCR)
The BRANCH ON CONDITION instructions test
the condition code to see whether a branch should
or should not be taken. The branch is taken only if
the condition code is as specified by a mask.
Mask
Value
8
4
2
1
Condition
Code
o
1
2
3
For example, assume that an ADD (A or AR)
operation has been performed and that you wish to
branch to address 6050 if the sum is zero or less
(condition code 0 or 1). Also assume:
Register 10 contains 00 00 50 00.
Register 11 contains 00 00 10 00.
The RX form of the instruction performs the
required test (and branch if necessary) when
written as:
Machine Format
Op Code
47
C
B
A
I
050
1
Assembler Format
Op Code
Ml,D2(X2,B2)
BC
12,X
I
50
1
(11,10)
A mask of 15 indicates a branch on any
condition (an unconditional branch). A mask of
zero indicates that no branch is to occur (a
no-operation) .
BRANCH ON COUNT (BCT, BCTR)
The BRANCH ON COUNT instructions are often
used to execute a program loop for a specified
number of times. For example, assume that the
following represents some lines of coding in an
assembler-language program:
Appendix A. Number Representation and Instruction-Use Examples
A-7

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