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Interruptible Instructions; Point Of Interruption; Execution Of Interruptible Instructions - IBM 4300 Manual

Processors principles of operation for ecps: vse mode
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address in the old PSW designates the instruction
whose execution was nullified instead of the next
sequential instruction.
Termination of instruction execution causes the
contents of any fields due to be changed by the
instruction to be unpredictable. The operation may
have replaced all, part, or none of the contents of
the designated result fields and may have changed
the condition code if such change was called for by
the instruction. Unless the interruption is caused
by a machine-check condition, the validity of the
instruction address in the PSW,.the interruption
code, and the ILC are not affected, and the state
or the operation of the machine has not been
affected in any other way. The instruction address
in the old PSW on an interruption after termination
designates the next sequential instruction.
I
Partial completion of instruction execution
occurs only for interruptible instructions; it is
described in the next section.
Interruptible Instructions
Point of Interruption
For most instructions, the entire execution of an
instruction is one operation. An interruption is
permitted between operations; that is, an
interruption can occur after the performance of one
operation and before the start of a subsequent
operation.
For the following instructions, referred to as
interruptible instructions, an interruption is
permitted after partial completion of the
instruction:
COMPARE LOGICAL LONG
MOVE LONG
The execution of an interruptible instruction is
considered to consist of a number of units of
operation, and an interruption is permitted between
units of operation. The amount of data processed
in a unit of operation depends on the particular
instruction and may depend on the model and on
the particular condition that causes the execution of
the instruction to be interrupted.
Whenever points of interruption that include
those occurring within the execution of an
interruptible instruction are discussed, the term
"unit of operation" is used. For a noninterruptible
instruction, the entire execution consists, in effect,
of one unit of operation.
Execution of Interruptible Instructions
The execution of an interruptible instruction is
completed when all units of operation associated
5-6
IBM 4300 Processors Principles of Operation
with that instruction are completed. When an
interruption occurs after completion, nullification,
or suppression of a unit of operation, all prior units
of operation have been completed.
On completion of a unit of operation other than
the last one (and on nullification of any unit of
operation), the instruction address in the old PSW
designates the interrupted instruction, and the
operand parameters are adjusted such that the
execution of the interrupted instruction is resumed
from the point of interruption when the old PSW
stored on the interruption is made the current PSW.
It
depends on the instruction how the operand
parameters are adjusted.
When a unit of operation is suppressed, the
instruction address in the old PSW designates the
next sequential instruction. The operand
parameters, however, are adjusted so as to indicate
the extent to which instruction execution has been
completed.
If
the instruction is reexecuted after
the conditions causing the suppression have been
removed, the execution is resumed from the point
of interruption. As in the case of completion and
nullification, it depends on the instruction how the
operand parameters are adjusted.
When an exception which causes termination
occurs as part of a unit of operation of an
interruptible instruction, the entire operation is
terminated, and the contents, in general, of any
fields due to be changed by the instruction are
unpredictable. On such an interruption, the
instruction address in the old PSW designates the
next sequential instruction.
Programming Notes
1. Any interruption, other than supervisor call and
some program interruptions, can occur after a
partial execution of an interruptible instruction.
In particular, interruptions for external, I/O,
machine-check, restart, and program
interruptions for access exceptions and PER
events can occur between units of operation.
2. The amount of data processed in a unit of
operation of an interruptible instruction
depends on the model and may depend on the
type of condition which causes the execution of
the instruction to be interrupted or stopped.
Thus, when an interruption occurs at the end of
the current unit of operation, the length of the
unit of operation may be different for different
types of interruptions. Also, when the stop
function is requested during the execution of an
interruptible instruction, the CPU enters the

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