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Load Halfword; Load Multiple; Load Negative; Load Positive - IBM 4300 Manual

Processors principles of operation for ecps: vse mode
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An overflow causes a program interruption when
the fixed-point-overflow mask bit is one.
Resulting Condition Code:
o
Result is zero
1
Result is less than zero
2
Result is greater than zero
3
Overflow
Program Exceptions:
Fixed-Point Overflow
Programming Note
The operation complements all numbers. Zero and
the maximum negative number remain unchanged.
An overflow condition occurs when the maximum
n'egative number is complemented:
LOAD HALFWORD
LH
[RX]
o
8
12
1620
31
The second operand is extended to a 32-bit signed
binary integer and placed in the first-operand
location. The second operand is two bytes in
length and is considered to be a 16-bit signed
binary integer. The second operand is extended by
propagating the sign-bit value through the 16
high-order bit positions.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2)
Programming Note
An example of the use of LOAD HALFWORD is
given in Appendix A.
LOAD MULTIPLE
[RS]
o
8
12
16
20
31
The set of general registers starting with the
register specified by R
1,
and ending with the
register specified by R3 is loaded from storage
7-20
IBM 4300 Processors Principles
01
vperation
beginning at the location designated by the
second-operand address and continuing through as
many locations as needed.
The general registers are loaded in the ascending
order of their register numbers, starting with the
register specified by RI and continuing up to and
including the register specified by R 3 , with register
o
following register 15.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2)
Programming Note
All combinations of register numbers specified by
Rl and R3 are valid. When the register numbers
are equal, only four bytes are transmitted. When
the number specified by R3 is less than the number
specified by R
l'
the register numbers wrap around
from 15 toO.
LOAD NEGATIVE
LNR
o
8
12
15
The two's complement of the absolute value of the
second operand is· placed in the first-operand
location. The second operand and result are
treated as 32-bit signed binary integers.
Resulting Condition Code:
o
Result is zero
1
Result is less than zero
2
3
Program Exceptions: None.
Programming Note
The operation complements positive numbers;
negative numbers remain unchanged. The number
zero remains unchanged.
LOAD POSITIVE
LPR
1
10
I
o
8
12
15

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