Advertisement
with an increase of the characteristic by one. The
fraction is then truncated to the proper result-
fraction length.
An exponent-overflow exception is recognized
when the characteristic of the final quotient would
exceed 127 and the fraction is not zero. The
operation is completed by making the characteristic
128 less than the correct value. The result is
normalized, and the sign and fraction remain
correct. A program interruption for exponent
overflow occurs.
An exponent-underflow exception exists when
the characteristic of the final quotient would be less
than zero and the fraction is not zero. If the
exponent-underflow mask bit is one, the operation
is completed by making the characteristic 128
greater than the correct value, and a program
interruption for exponent underflow occurs. The
result is normalized, and the sign and fraction
remain correct. If the exponent-underflow mask
bit is zero, a program interruption does not take
place; instead, the operation is completed by
making the quotient a true zero.
Exponent underflow does not occur when an
operand characteristic becomes less than zero
during normalization of the operands or when the
intermediate-quotient characteristic is less than
zero, as long as the final quotient can be
represented with the correct characteristic.
When the divisor fraction is zero, the operation
is suppressed, and a program interruption for
floating-point divide occurs. This includes the
division of zero by zero.
When the dividend fraction is zero, but the
divisor fraction is nonzero, the quotient is made a
true zero. No exponent overflow or exponent
underflow occurs.
The sign of the quotient is determined by the
rules of algebra, except that the sign is always plus
when the quotient is made a true zero.
The Rl field for DER, DE, DDR, and DD, and
the R2 field for DER and DDR, must designate
register 0, 2, 4, or 6. Otherwise, a specification
exception is recognized.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2 of DD and DE only)
Exponent Overflow
Exponent Underflow
Floating-Point Divide
Specification
HALVE
[RR, Short Operands]
o
8
12
15
[RR, Long Operands]
o
8
12
15
The second operand is divided by 2, and the
normalized quotient is placed in the first-operand
location.
The fraction of the second operand is shifted
right one bit position, placing the contents of the
rightmost bit position into the leftmost bit position
of the guard digit and introducing a zero into the
leftmost bit position of the fraction. The
intermediate result, including the guard digit, is
then normalized, and the final result is truncated to
the proper length.
An exponent-underflow exception exists when
the characteristic of the final result would be less
than zero and the fraction is not zero. If the
exponent-underflow mask bit is one, the operation
is completed by making the characteristic 128
greater than the correct value, and a progratp.
interruption for exponent underflow occurs. The
result is normalized, and the sign and fraction
remain correct. If the exponent-underflow mask
bit is zero, a program interruption does not take
place; instead, the operation is completed by
making the result a true zero.
When the fraction of the second operand is zero,
the result is made a true zero, and no exponent
underflow occurs.
The sign of the result is the same as that of the
second operand, except that the sign is always plus
when the quotient is made a true zero.
The R
1
and
R2
fields must designate register 0,
2, 4, or 6; otherwise, a specification exception is
recognized.
Condition Code: The code remains unchanged.
Program Exceptions:
Exponent Underflow
Specification
Chapter 9. Floating-Point Instructions
9-9
Advertisement
Chapters
