Advertisement
Information identifying the designated channel is
stored in the four-byte field at storage location
168.
Bits 16-23 of the second-operand address
identify the channel to which the instruction
applies. Bit positions 24-31 of the address are
ignored.
The format of the information stored at location
168 is:
ITypelChannel Model 100000000000000001
o
4
16
31
Bits 0-3 specify the channel type. When a
channel can operate as more than one type, the
code stored identifies the channel type at the time
the instruction is executed. The following codes
are assigned:
0000 Selector
0001 Byte multiplexer
0010 Block multiplexer
A block-multiplexer channel operates as a
selector channel if the most recently initiated yet
uncompleted I/O operation in the channel had
block multiplexing inhibited at the time the I/O
operation was initiated.
Bits 4-15 identify the channel model. When the
channel model is implied by the channel type and
the CPU model, zeros are stored in the field.
Bits 16-31 are set to zeros.
When the channel detects an equipment
malfunction during the execution of STORE
CHANNEL ID, the channel causes the status
portion, bits 32-47, of the CSW to be replaced by a
new set of status bits. With the exception of the
channel-control-check bit (bit 45), which is stored
as a one, all bits in the status field are stored as
zeros. The contents of the other fields of the CSW
are not changed.
When STORE CHANNEL ID cannot be
executed because of a pending logout which affects
the operational capability of the channel, a full
CSW is stored. The fields in the CSW are all set to
zero, with the exception of the logout-pending bit
and the channel-control-check bit, which are set to
ones. No channel logout occurs in this case.
Program Exceptions:
Privileged Operation
12-24
IBM 4300 Processors Principles of Operation
Resulting Condition Code:
o
Channel ID correctly stored
1
CSW stored
2
Channel activity prohibited storing ID
3
Not operational
The condition code set by STORE CHANNEL
ID for all possible states of the I/O system is
shown in the figure "Condition Codes Set by
STORE CHANNEL ID." See "States of the
Input/ Output System" for a detailed definition of
the A, I, W, and N states.
Channel~I~I~I-i-1
A
Available
I
Interruption pending
W
Working
N
Not operational
•
When the channel is unable to store
the channel ID because of its working
state or because it contains a
pending-interruption condition,
condition code 2 is set.
If the
working rir interruption-pending state
does not preclude the storing of the
channe liD, cond it i on code 0 is set.
Condition Codes Set
by
STORE CHANNEL ID
TEST CHANNEL
TCH
[5]
9FOO
o
16
20
31
The condition code in the PSW is set to indicate
the state of the addressed channel. The state of
the channel is not affected, and no action is
caused. Bits 8-14 of the instruction are ignored.
Bits 16-23 of the second-operand address
identify the channel to which the instruction
applies. Bit positions 24-31 of the address are
ignored.
The instruction TEST CHANNEL inspects only
the state of the addressed channel. It tests whether
the channel is operating in the burst mode, is
interruption-pending, or is not operational. When
the channel is operating in the burst mode and
contains an interruption condition, the condition
code is set as for operation in the burst mode.
When none of these situations exist, the available
Advertisement
Chapters
