Subtract Normalized - IBM 4300 Manual

SUBTRACT NORMALIZED
[RR, Short Operands]
o
8
12 15
SE R1,02(X2,B2) [RX, Short Operands]
I
7B
I
I
R 1
I
X2
I
B2 02
o
8
12 16 20 31
[RR, Long Operands]
o
8
12 15
SO R1,02(X2,B2) [RX, Long Operands]
I
6B
I
I
R 1
I
X2
I
B2 02
o
8
12 16 20 31
SXR R1,R2 [RR, Extended Operands]
137
I
I
R 1
I
R2
o
8
12 15
The second operand is subtracted from the first
operand, and the normalized difference is placed in
the first-operand location.
The execution of SUBTRACT NORMALIZED is
identical to that of ADD NORMALIZED, except
that the second operand participates in the
operation with its sign bit inverted.
The Rl field of SER, SE, SDR, and SD, and the
R2 field of SER and SDR must designate register 0,
2,4, or 6. The Rl and R2 fields of SXR must
designate register 0 or 4. Otherwise, a
specification exception is recognized.
Resulting Condition Code:
o
Result fraction is zero
1 Result is less than zero
2 Result is greater than zero
3
9-14 IBM 4300 Processors Principles of Operation
Program Exceptions:
Access (fetch, operand 20f SE and SD only)
Exponent Overflow
Exponent Underflow
Significance
Specification
SUBTRACT lJ.NNORMALIZED
SUR R1,R2
[RR, Short Operands]
o
8
12 15
SU R1,02(X2,B2) [RX, Short Operands]
I
7F
I
I
R 1
I
X2
I
B2 02
o
8
12 16 20
31
[RR, Long Operands]
o
8
12 15
SW R1,02(X2,B2) [RX, Long Operands]
I
6F
I
I
R 1
I
X2
I
B2 02
o
8
12 16 20 31
The second operand is subtracted from the first
operand, and the unnormalized difference is placed
in the first-operand location.
The execution of SUBTRACT UNNORMAL-
IZED is identical to that of ADD
UNNORMALIZED, except that the second
operand participates in the operation with its sign
bit inverted.
The Rl and R2 fields must designate register 0,
2, 4, or 6; otherwise, a specification exception is
recognized.