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Chapter 3. Storage
Contents
Storage Addressing
3-1
Information Formats
3-2
Integral Boundaries
3-2
One-Level-Addressing Facility
Storage Size
3-3
Pages
3-4
Page Frames
3-4
Page Description
3-4
Storage Key
3-4
Page Bits
Page States
Frame Index
3-4
3-5
3-5
3-3
This chapter discusses the representation of
information in storage, how information is
addressed, and the one-level-addressing facility for
controlling virtual and real storage. The chapter
also contains a list of permanently assigned storage
locations.
The term "main storage" is used generically to
describe both virtual and real storage, in order to
distinguish this fast-access storage from auxiliary
storage, such as direct-access storage devices.
Physically, main storage may be composed of a
high-capacity fast storage medium and a smaller
but faster buffer storage, sometimes called a cache.
The effects, except on performance, of the physical
construction and the use of distinct storage media
are not observable by the program. Because, in
this publication, most references to main storage
apply to virtual storage, the abbreviated term
11
storage" is generally used in
p~ace
of "virtual
storage" when the meaning is clear.
All addresses of storage locations are virtual
addresses, because they always refer to virtual
storage. Hence, when applied to main storage,
address means virtual address in this pUblication.
Storage Addressing
Storage is viewed as a long horizontal string of bits.
For most operations, accesses to storage proceed in
a left-to-right sequence. The string of bits is
Page and Frame Control
3-6
Capacity Counts
3-6
Storage-Control Instructions
3-6
Key-Controlled Protection
3-7
Reference Recording
3-8
Change Recording
3-8
Assigned Storage Locations
3-9
Storage While CPU is in Operating State
Storage While CPU is in Load State
3-9
3-10
subdivided into units of eight bits. An eight-bit
unit is called a byte, which is the basic building
block of all information formats.
Each byte location in storage is identified by a
unique nonnegative integer, which is the address of
that byte location or, simply, the· byte address.
Adjacent byte locations have consecutive addresses,
starting with 0 on the left and proceeding in a
left-to-right sequence. Addresses are 24-bit
unsigned binary integers, which provide 16,777,216
(2 24 or 16M) byte addresses.
The CPU performs address generation when it
forms an operand or instruction address. It also
performs address generation when it increments an
address to access successive bytes of a field.
Similarly, the channel generates an address when it
increments an address to fetch a channel-command
word (CCW) from a CCW list or to transfer data.
When, during address generation, an address is
obtained that exceeds 224 - 1, the carry out of the
high-order bit position of the address is ignored.
This handling of an address of excessive size is
called wraparound.
The effect of wraparound is to make the
sequence of addresses appear circular; that is,
address 0 appears to follow the maximum byte
address, 16,777,215. In 16M-byte storage,
information may be located partially in the last and
partially in the first locations of storage and is
Chapter 3. Storage
3-1
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