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When the exception is a speCification exception
for a store-type operand which requires alignment
on integral boundaries, the update which may occur
is limited to the single byte at the location specified
by the operand address.
Programming Note
Examples of when an update may occur to the
destination-operand location in storage are:
• Decimal-divide exception for DIVIDE
DECIMAL
• Specification exception for an odd register
number for COMPARE DOUBLE AND SWAP
• Data exception for an invalid decimal sign for
ADD DECIMAL
Sequence of Storage References
Conceptually, the CPU processes instructions one
at a time, with the execution of one instruction
preceding the execution of the following
instruction. The execution of the instruction
specified by a successful branch follows the
execution of the branch. Similarly, an interruption
takes place between instructions or, for
interruptible instructions, between units of
operation of such instructions.
The sequence of events implied by the processing
just described is sometimes called the conceptual
sequence.
Each operation appears to the program to be
performed sequentially, with the current instruction
being fetched after the preceding operation is
completed and before the execution of the current
operation is begun. This appearance is maintained,
even though the storage-implementation
characteristics and overlap of instruction execution
with storage accessing may cause actual processing
to be different. The results generated are those
that would have been obtained had the operations
been performed in the conceptual sequence. Thus,
it is possible for an instruction to modify the next
succeeding instruction in storage.
In simple models in which operations are not
overlapped, the conceptual and actual sequences
are essentially the same. However, in more
complex machines, overlapped operation, buffering
of operands and results, and execution times which
are comparable to the propagation delays between
units can cause the actual sequence to differ
considerably from the conceptual sequence. In
these machines, special circuitry is employed to
detect dependencies between operations and ensure
that the results obtained are those that would have
5-8
IBM 4300 Processors Principles of Operation
been obtained if the operations had been performed
in the conceptual sequence. However, channels
may, unless otherwise constrained, observe a
sequence that differs from the conceptual sequence.
rt
can normally be assumed that the execution of
each instruction occurs as an indivisible event.
However, in actual operation, the execution of an
instruction consists of a series of discrete steps.
Depending on the instruction, operands may be
fetched and stored in a piecemeal fashion, and
some delay may occur between fetching operands
and storing results. As a consequence, a channel
may be able to observe intermediate or partially
completed results.
When the program on the CPU interacts with a
program on a channel, the programs may have to
take into consideration that a single operation may
consist of a series of storage references, that a
storage reference may in turn consist of a series of
accesses, and that the conceptual and actual
sequences of these accesses may differ. Storage
references associated with instruction execution are
of the following types: instruction fetches and
storage-operand references. For the purposes of
the following discussion, page-description accesses
are also considered to be storage references.
Programming Note
The sequence of execution may differ from the
simple conceptual definition in the following ways.
• As viewed by a program in a channel, the
execution of an instruction may appear to be
performed as a sequence of piecemeal steps.
This is described for each type of storage
reference in one of the following sections.
• As viewed by a program in a channel, the
storage-operand accesses associated with one
instruction are not necessarily performed in the
conceptual sequence. (See the section "Relation
Between Operand Accesses" in this chapter.)
• As viewed by a program in a channel, in certain
unusual situations, the contents of storage may
appear to change and then be restored to the
original value. (See the section "Storage Change
and Restoration for Page Access Exceptions"
earlier in this chapter.)
Instruction Fetching
Instruction fetching consists in fetching the one,
two, or three halfwords specified by the instruction
address in the current PSW. The immediate field
of an instruction is accessed as part of an
instruction fetch. If, however, an instruction
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