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STORE CPU TIMER
IB209
1
B2
o
16
20
31
The current value of the CPU timer is stored at the
double word location designated by the
second-operand address.
Zeros are provided for the rightmost bit positions
that are not updated by the CPU timer.
The operand must be designated on a
doubleword boundary; otherwise, a specification
exception is recognized, and the operation is
suppressed. The operation is suppressed on
addressing and protection exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (store, operand 2)
Privileged Operation
Specification
STORE THEN AND SYSTEM MASK
o
8
16
20
31
Bits 0-7 of the current PSW are stored at the
first-operand location. Then the contents of bit
positions 0-7 of the current PSW are replaced by
the logical AND of their original contents and the
second operand.
The operation is suppressed on addressing and
protection exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (store, operand 1)
Privileged Operation
Programming Note
The STORE THEN AND SYSTEM MASK
instruction permits the program to set selected bits
in the system mask to zeros while retaimBgthe::
original contents for later restoration.
For
example, it may be necessary that a program, which
has no record of the present status, disable
program-event recording for a few instructions.
STORE THEN OR SYSTEM MASK
o
8
16
20
31
Bits 0-7 of the current PSW are stored at the
first-operand location. Then the contents of bit
positions 0-7 of the current PSW are replaced by
the logical OR of their original contents and the
second operand.
The value to be loaded into the PSW is not
checked for validity before loading. However,
immediately after loading, a specification exception
is recognized, and a program interruption occurs, if
the CPU is in the EC mode and the contents of bit
positions 0 and 2-5 of the PSW are not all zeros.
In this case, the instruction is completed, and the
instruction-length code is set to 2. The
specification exception in this case is considered to
be caused as part of the execution of the
instruction.
The operation is suppressed on addressing and
protection exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Access (store, operand 1)
Privileged Operation
Specification
Programming Note
The STORE THEN OR SYSTEM MASK
instruction permits the program to set selected bits
in the system mask to ones while retaining the
original contents for later restoration. For
example, the program may enable the CPU for 1/0
interruptions without having available the current
status of the external-mask bit.
Chapter 10. Control Instructions
10-13
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