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Instructions
All I/O instructions cause a serialization function
to be performed. See the section "Serialization" in
Chapter 5, "Program Execution."
.
The names, mnemonics, format, and operatIOn
codes of the I/O instructions are listed in the figure
"Input/Output Instructions." The figure also
indicates that all I/O instructions cause a program
interruption when they are encountered in the
problem state, that all I/O instructions set the
condition code, and that all I/O instructions are in
the S instruction format.
Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic
operand designation for the assembler language are
shown with each instruction. In the case of
START I/O, for example, SID is the mnemonic
and D
lB
~
the operand designation.
Programming Note
The instructions CLEAR I/O, HALT DEVICE,
HALT I/O, START I/O, START I/O FAST
RELEASE, STORE CHANNEL ID, and TEST I/O
cause a CSW to be stored. To prevent the contents
of the CSW stored by the instruction from being
destroyed by an immediately following I/O
interruption, the CPU must be disabled for all I/O
interruptions before CLEAR I/O, HALT DEVICE,
HALT I/O, START I/O, START I/O FAST
RELEASE, STORE CHANNEL ID, and TEST I/O
is issued and must remain disabled until the
information in the CSW provided by the instruction
Mne-
Name
monic
has been acted upon or stored elsewhere for later
use.
CLEAR I/O
CLRIO
[S]
9D01
o
16
20
31
Either a TIO or CLRIO function is performed,
depending on the block-multiplexing control, bit 0
of control register O. The TIO function is
performed when the block-multiplexing-control bit
is zero.
The TIO function is described in the definition
of the instruction TEST I/O.
Bits 8-14 of the instruction are ignored. Bit
positions 16-31 of the second-operand address
identify the channel, subchannel, and I/O device to
which the instruction applies.
The CLRIO function causes the current
operation with the addressed device to be
discontinued and the state of the operation at the
time of the discontinuation to be indicated in the
stored CSW.
When the subchannel is available, interruption-
pending with another device, or working with
another device, no channel action is taken, and
condition code 0 is set. Channels not capable of
determining subchannel states while in the working
state may instead set condition code 2.
Op
Characteristics
Code
CLEAR I/O
CLRIO S
C
P
$
9D01*
9E01*
HALT DEVICE
HDV
S
C
P
$
9EOO*
HALT I/O
HIO
S
C
P
$
9COO*
START I/O
SIO
S
C
P
$
9C01*
START I/O FAST RELEASE
SIOF
S
C
P
$
STORE CHANNEL ID
STIDC S
C
P
$
B203
TCH
S
C
P
$
9FOO;t
TEST CHANNEL
9000*
TEST I/O
TIO
S
C
P
$
Explanation:
C
Condition code is set.
P
Privileged-operation exception.
S
S instruction format.
*
Bits 8-14 of the operation code are ignored.
;t
Bits 8-15 of the operation code are ignored.
$
Causes serialization.
Summary of Input/Output Instructions
12-14
IBM 4300 Processors Principles of Operation
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