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Channel-Status Word - IBM 4300 Manual

Processors principles of operation for ecps: vse mode
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Channel-Status Word
The channel-status word (CSW) provides to the
program the status of an I/O device or the
indication of the reasons for which an I/O
operation has been concluded. The CSW is
formed, or parts of it are replaced, in the process of
1/
°
interruptions and possibly during the execution
of START I/O, START I/O FAST RELEASE,
TESTI/O,CLEARI/O,HALTI/O,HALT
DEVICE, and STORE CHANNEL ID. The CSW
is stored at location 64 and is available to the
program at this location until the time the next I/O
interruption occurs or until another 1/
°
instruction
causes its contents to be replaced, whichever occurs
first.
The information placed in the CSW by an I/O
interruption pertains to the device which is
identified by the I/O address stored during the
interruption. The information placed in the CSW
by START I/O, START I/O FAST RELEASE,
TESTI/O,CLEARI/O,HALTI/O,orHALT
DEVICE pertains to the device addressed by the
instruction.
o
32
The CSW has the following format:
CCW Address
4 6 8
Unit
Channel
Status
Status
40
Count
48
31
63
The fields in the CSW are allocated as follows:
Subchannel Key: Bits 0-3 form the access key used
in the chain of operations at the subchannel.
Logout Pending (L): Bit 5, when one, indicates
that an I/O instruction cannot be executed until a
logout has been cleared. Bit 45, channel-control
check, will always be one when bit 5 is one.
Deferred Condition Code (CC): Bits 6 and 7
indicate whether situations have been encountered
subsequent to the setting of a condition code 0 for
ST AR T I/O FAST RELEASE that would have
caused a different condition-code setting for
START I/O. The possible setting of these bits,
and their meanings, are as follows:
Setting of
Bit
6
Bit
7
Meaning
0
0
Normal I/O interruption
0
1
Deferred condition code is
1
1
0
(Reserved)
1
1
Deferred condition code is
3
CCW Address: Bits 8-31 form an address that is 8
higher than the address of the last CCW used.
Status: Bits 32-47 identify the status of the device
and the channel that caused the storing of the
CSW. Bits 32-39, the unit status, indicate
situations detected by the device or control unit.
Bits 40-47, the channel status, are provided by the
channel and indicate situations associated with the
subchannel. The 16 bits are designated as follows:
Bit
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
Designation
Attention
Status modifier
Control-unit end
Busy
Channel end
Device end
Unit check
Unit exception
Program-controlled interruption
Incorrect length
Program check
Protection check
Channel-data check
Channel-control check
Interface-control check
Chaining check
Count: Bits 48-63 form the residual count for the
last CCW used.
Chapter 12. Input/Output Operations
12-47

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